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The Glue that Binds EDA Together

It’s been widely reported that for every $1 spent on EDA tools that the users end up spending another $3 to make the flow of tools work together. This means job security for CAD groups however it’s a...

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New Logic Synthesis Vendor Unveiled

If your next design has 100 million gates then what tools are you going to use for logic synthesis? Until today you would be faced with breaking up your design into blocks and then stitching them...

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Magma’s Titan – Analog Elegance

Last Friday I had an online meeting with Ashutosh Mauskar, vice president of Magma’s Custom Design Business Unit to learn what was new with the Titan product lineup. Magma has been very involved with...

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Making SPICE Go Faster with a GPU

Amr Bayoumi, Ph.D.  (Chief Technical Adviser) from New Systems Research spoke with me via Skype on Friday. We had a DAC meeting scheduled but I made a mistake about the meeting location and missed it....

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New Parallel SPICE Start-up Company

SPICE is a wonderful tool for transistor-level circuit designers to predict speed, timing and power of their sensitive designs across Process, Voltage and Temperature regions or corners. One problem is...

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Tanner EDA adds Analog IC Layout Automation

I talked with Nicholas Williams of Tanner EDA by phone yesterday to learn more about a new product called HiPer DevGen. Their first two analog IC generators are for: Differential pairs Current mirrors...

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New ESD Software Tool from Apache

On Thursday morning I spoke with Dian Yang, Sr VP of Product Engineering at Apache by phone about a new ESD software tool called PathFinder (sorry Nissan, but this isn’t an autom0bile). I learned how...

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Faster IC Designs Without Using a Clock and With Delay Insensitive Results

Digital designers are taught on day one that they must use synchronous logic design which employ a clock to synchronize all events in their IC design, and so it has been for decades. Unless of course...

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